Participants : Marc, Yuhang

Here are the figures :

First no DDS board connected to the rack : all the peaks disappear.

Then, DDS board connected one by one we can see that each DDS is causing one of the peak around 20 kHz.

DDS1 -> 18 112 Hz

DDS2 -> 17 728 Hz

DDS3 -> 21 312 Hz

Marc and Yuhang

We used signal generator AFG3102 to modu/demodu SHG fields (instead of DDS1). At the same time, all DDS boards were taken out from rack. Then we locked SHG and checked error signal spectrum. We found 20kHz noise disappeared. Figure 1 (SHGNODDS.txt) shows error signal spectrum in this measurement.

After that we also checked the rack voltage, which may change due to large power consumption.

We measured error signals when there were DDS1 only (DDS1.txt), DDS2 only (DDS2.txt), DDS3 only (DDS3.txt) and clock removed (no clock.tx).

Marc, Michael, Yuhang

The issue of SHG error signal happened after installing amplifiers for DDS1 board. Therefore, we suspect that it may be related to DDS1.

To test if issues are really related to DDS1, we kept DDS1 on but used signal generator to provide modulation and demodulation.

Signal in use: 1dBm sent to EOM, 7dBm sent to mixer. The other in-loop components were the same. Then optimized phase and locked SHG loop and measured error signal spectrum. Figure 1 shows this spectrum and we can see that 20kHz noise is still present.

Other checks could be done:

0. try to do the same test with this entry but DDS needs to be off

1. try to use different rack to power up DDS/servo

2. try to see if 20kHz appear in GRMC error signal

3. try to see if 20kHz signal appears in signal beofre demodulation

4. try to change modulation/demodulation frequency a bit

5. try to use SR560 pre-amplifier to lock SHG

Marc, Michael, Yuhang

We found the peaks in OPO and SHG spectrums were quite similar. To make sure they could have the same source, we made measurement of their coherence. Figure 1 shows their coherence.

Marc, Michael, Yuhang

By take the spectrum of IRMC reflection (IRMC unlocked), we checked the main laser intensity noise. Figure one shows this result.

We could see that it is quite flat. So it should not cause problems for SHG/OPO error signals.

Marc, Michael, Yuhang

We checked the spectrum of power supply of rack. This rack contains PLL servos.

The check was done for -24V/ground and 24V/ground. However, there were issues happened at some point. The issue is that I connected -24V to ground by mistake once. Then I heard the sound from the rack. I switched off the rack power supply as soon as I heard the sound. After that happed, I took another two spectrums. Figure 1 shows these spectrums.

Marc and Yuhang (Eleonora remotely)

As reported in elog2322, we had oscillation in SHG length control error signal. Those peaks appear around about 20kHz and show harmonics.

The attached figure shows SHG transmission spectrum, which shows the same peaks found in error signal spectrum. But those peaks were not present in SHG transmission old measurement (elog1276).

We need to investigate more about this issue. One check could be measuring sound spectrum. Since these peaks also appear in OPO error signal spectrum, another check could be measuring the main laser amplitude noise.

Marc and Yuhang

For DDS1, we found the signals used for SHG/IRMC/OPO demodulation are smaller than 7dBm. However, the mixers require at least 7dBm signals. Therefore, we decide to install amplifiers for corresponding DDS channels. After the installation, the situation of DDS1 is shown as follows:

DDS1 CH0: DDS output = -8dBm output (for SHG/IRMC modulation)

DDS1 CH1: DDS output+18dB amplifier+power splitter = 7dBm output *2 (for SHG/IRMC demodulation)

DDS1 CH2: DDS output =  -8dBm output (for OPO modulation)

DDS1 CH3: DDS output+18dB amplifier= 10dBm output  (for OPO demodulation)

Since we are using internal amplifiers for SHG/IRMC/OPO demodulation, their old amplifiers will not be used.

We did the test and found that DDS1 board works well and they are outputing good values. Then we optimized all PDH signals, measured TFs and error signals. The results of measurements are attached.

Marc and Yuhang

The first test of DDS3 board showed problem about USB connection. Therefore, we checked the connection and soldering of USB. We found a soldering problem related to USB connector. After that, we tried to solder it again. Following problems about soldering cost us quite a lot of time:

1. The wires going through the breadboard holes are not straight, which make wires very diffcult to be removed

2. A relatively large hole needs to be soldered in order to fix USB on the breadboard. When the solder is applied to an inappropriate side of this large hole, it causes the USB outer shell touching ground. We checked a working DDS board, whose USB's outer shell is not connected to ground. Due to this inappropriate solder, we wasted a USB connector.

3. When fixing USB on the breadboard, we need to choose the two sides of the breadboard. But only one side will make a correct connection.

After solving these problems, we tested DDS3 board output signal magnitude and put attenuator to get required level of signals.

DDS3 CH0: DDS output+18dB amplifier+12dB attenuator = -2dBm output (for PLL CC)

DDS3 CH1: DDS output+18dB amplifier+12dB attenuator = -2dBm output (for PLL ppol)

DDS3 CH2: DDS output+18dB amplifier+power splitter = 7dBm output *2  (for CC1 and CCFC)

DDS3 CH3: DDS output+18dB amplifier+10dB attenuator = 0dBm output  (for CC2)

We compared the PLL phase noise for the cases of using -8dBm LO and -2dBm LO. From the datasheet of ADF4002, it requires LO from -5dBm to 2dBm. Therefore, we should prefer -2dBm LO. Figure 1 and 2 show the comparison of PLL phase noise. However, the shape of phase noise curve is not in agree with the measurement done in elog863, which needs further investigation.

On the other hand, higher LO also makes a higher phase noise. This is out of our expectation.

Michael, Marc and Yuhang

DDS signals usually give an output of -6dBm, which is not enough for many mixers. Due to the lack of enough LO power, we had issues, such as CCFC error demodulation. To solve this problem, Matteo ordered several amplifiers. The idea is to put them inside the DDS board and connect the DDS output directly to them.

Yesterday, Aso-san kindly provided us an instruction before the implementation of these amplifiers. Today, we followed the design of Matteo and implemented part of those amplifiers (for DDS2 and DDS3).

Figure 1 shows the connection done for an amplifier (We did five in total for today).

Figure 2 shows the DDS2 board before putting amplifier (we found unfiltered CH1 output is giving signal).

Figure 3 shows the DDS2 board after putting the amplifier.

Then I took it to TAMA and did several tests. In the beginning, I found the signal was not present in CH1. Then I changed CH1 from unfiltered CH1 to filtered CH1(shown in attached figure 4). After this, I discovered that signal (shown in figure 5) increase from -8dBm to 9dBm after amplifier implementation. This signal is used as LO to demodulate the filter cavity length error signal for GR. Figures 6 and 7 show the check of PDH amplitude for these two cases. The PDH becomes a bit smaller with a larger LO. I compared TF and GR locking length noise with these two cases.

Figure 8 shows TFs. After implementing the amplifier, the unity gain frequency is smaller while the phase margin is better. The amplified case also shows a better phase for higher (compared with UGF) frequency region.

Figure 9 shows error signals. After implementing the amplifier, the integrated length noise becomes less. This error signal is not calibrated. Besides, it maybe better to compare them again when they have almost the same unity gain frequency.

All amplifiers are also installed inside DDS3. We will test it tomorrow.

The time (around JST 2am 21st Dec 2020) of this sudden change has coincidence with an earthquake.

Marc and Yuhang

We found difficulty to align FC on this Monday. Then we checked oplev signals and found a sudden position change for END mirror (figure 1, we didn't find sudden change on INPUT).

By changing DC offset for END, its oplev sensing signals were recovered (figure 2).

Marc, Michael and Yuhang

In september, we had problem of FDS measurement, which is the FDS feature (rotation from sqz(asqz) to asqz(sqz)) disappeared when we locked CCFC loop. After that, it has been long time we didn't measure FDS again. Recently, we would like to change the FDS configuration. So we decide to redo the FDS measurement before going on. The important degradation sources are as following:

Green power: 25mW (11dB generated squeezing)

optical losses: 68%

CC2 loop introduced a 30dB attenuator for error signal (We found CC2 loop always had oscillation & CC2 loop could be only closed when the gain is small)

other parameters are kept the same with setting in this Feb. Besides, detuning was chosen to be 114Hz (this number is calculated from entry 2296)

The measurement was sometimes not stable today. This instability was the squeezing level going up and down for each measurement. However, this happened while CC1 and CC2 loop were both locked(a bit strange for me, we could check those spectrums). Anyway, we found some stable moments and took measurement.

According to the mentioned degradation sources, I tried to fit data and got results in attached figure 1. The detuning was fit to a larger detuning compared with setting. Besides, the fit curves don't match well with data. However, the good point is that FDS could be measured again with CCFC loop closed. 

As mixers need to be operated in saturation mode, I temporarily take the amplifier channel used for IRMC demodulation to amplify the signal from DDS. DDS provides about -6dBm signals. With the mentioned amplifier, LO was amplified to about 5dBm. At the same time, the RF signal was about -15dBm.

When we scan the CCFC phase with a sine wave, the demodulated signals will deviate from sine wave if the demodulation process has problems. So I did this test with 5dBm LO (shown in attached figure 1) for different RF power (-15dBm, -9dBm, -6dBm and -3dBm). These tests are in attached figures 2 to 5. All these figures seem to provide good shape demodulated signals (sinusoidal). From these figures, we could also see that the pk-pk signal also increases with the increase of RF power almost linearly (115mV, 206mV, 288mV, 380mV).

I also checked the CCFC error signals for these cases(figure 6,7,8). They are consistent with the error signals we found in elog2308. And apparently, better SNR is achieved with -3dBm RF power.

(We could add 12dB+12dB+3dB attenuator for the -3dBm signal to simulate a factor of ~25 decreases of CCSB power)

I fitted the measured CCFC error signal by fitting the CC detuning (with respect to carrier), demodulation phase, and starting time (first plot). In this plot, misalignment effect is not considered.

In the second plot, I added the misalignment effect in theoretical curve by fixing the mode matching to 94%.

Matteo and Yuhang

The suppression of filter cavity length noise provides stable detuning, which is vital for the production of frequency dependent squeezing. The CCFC control loop is designed to achieve this goal.

To understand better how CCFC control works, several characterization works have been done recently. They are listed as follows:

1. Figure 1 shows many length error signals and noise curves. The addition of CCFC error signal introduces length noise for GR loop at low frequency. This is validated by figure 3 and 4. The GR+IR error signal doesn't change because the filter cavity length change doesn't change.

2. Figure 2 shows correction signals. For the correction signals send to the main laser or end mirror, they are the same whether there is CCFC or not. This is consistent with the unchange of IR+GR error signal.

3. Figures 3 and 4 show FC GR TRA/REF DC spectrums. CCFC causes the GR length noise increase, which translates into intensity noise. 

In elog2231 and elog2267, a worse locking accuracy was found to be caused by AA.

Today I compared the FC_IR_TRA while AA is on or off. It seems AA induced noise increase doesn't have the same shape with FC length noise (but similar).

This noise increase is clearly visible but could be well suppressed if CCFC lock is implemented.

12dB attenuator was added for RF signal (before the 32dB amplifier)

12dB attenuation was applied to LO signal (DAC current control was reduced from 1/2(-12dBm) to 1/8(-24dBm))

Current RF amp: -15dBm

Current LO amp: -24dBm

[Aritomi, Yuhang, Matteo]

We found that we still had saturation problem of CCFC RF and LO so we reduced them.

Then we measured CCFC error signal with different CCFC demodulation phase (Pic. 1). AOM FM freq is 300 mHz and deviation is 2kHz, so AOM scan speed for IR is 4kHz/(5/3 s)/2 = 1.2 kHz/s. CCFC amplitude for normalization is 28 mV. The calibration factor of CCFC error signal is determined by fitting the blue curve around 0, which is 1191 Hz/V.

We locked CCFC with 70 deg and 250 deg CCFC demodulation phase (both are I phase, but sign is opposite) and compared the locking accuracy with CCFC lock (Pic. 2). We found that CCFC locking accuracy with 250 deg is smaller than 70 deg above 1kHz. Changing CCFC demod by 180 deg means that CCSB on resonance and off resonance are swapped. CCSB noise on resonance is filtered out by cavity pole while the noise of other CCSB is not. If noise of upper/lower CCSB are different, this noise difference can happen.

IR filter is 500 gain and 30 Hz low pass filter.

Anyway now CCFC locking accuracy is below 1Hz if the calibration factor is correct. Strange thing is that locking accuracy above 10kHz is much better than BAB locking accuracy with green lock.

Elog2300 described optimization for CCFC error signal. To characterize better these error signals, I put measured CCFC error signal as follows.

Figure 1 is CCFC error signal at different demodulation phase, after modematching optimization.

Figure 2 is CCFC error signal at different demodulation phase, after mixer optimization.